When a reticle pattern is to be projected and exposed onto a wafer, the wafer and reticle are aligned to each other first. Then, exposure is performed. In an alignment technique, two alignment processes, i.e., prealignment and fine alignment, are executed using an alignment mark formed on a wafer. Prealignment aims at detecting a feed shift amount that is generated when a wafer transferred by a wafer transfer apparatus is placed on a wafer chuck arranged on a stage in an exposure apparatus, and roughly aligning the wafer within an accuracy range that allows a normal fine alignment process. Fine alignment aims at accurately measuring the wafer position on the stage and accurately aligning the wafer such that the alignment error with respect to the reticle falls within an allowable range. Prealignment requires an accuracy of about 3 μm. Accuracy required for fine alignment changes depending on the required wafer process accuracy. For example, a 64-M DRAM requires an accuracy of 80 nm or less.
In prealignment, a feed shift that is generated when the transfer apparatus transfers the wafer onto the chuck must be detected, as described above. For this purpose, a very wide range must be detected. Generally, a 500-μm square range is detected. Pattern matching is often used to detect the X- and Y-coordinates of an alignment mark in such a wide range.
Pattern matching processes of this type are roughly classified into two methods. As one method, an image is binarized, matching between the image and a template prepared in advance is performed, and a position with the highest correlation is detected as the mark position. As the other method, a halftone image is directly correlated with a template having halftone information. Normalized correlation is often used in the latter method.
In the above-described pattern matching processes, it is difficult to detect the alignment mark in a low-contrast image, a noise image, or an image having a defect generated at the time of a wafer process. The present applicant has proposed in Japanese Patent Laid-Open No. 2000-260699, a mark detection method that allows stable detection for such an image whose alignment mark is difficult to detect. As a characteristic feature of this method, mark edges are suitably detected, the directional features of the edges are simultaneously detected, and pattern matching is performed on the basis of the edges of the respective direction components.
In prealignment, a very wide range is detected, though the alignment mark is small. This is because the alignment mark is a pattern that does not constitute the semiconductor pattern. To make the area of a semiconductor element as large as possible, the alignment mark must be small. For this reason, the alignment mark is often formed in a region that is not used as an element, e.g., a scribing line. Generally, the mark size is determined by the width of the scribing line.
As the semiconductor manufacturing process becomes more efficient, and the process accuracy increases in recent years, the width of a scribing line decreases year by year. A scribing line is now as thin as 100 μm or less. Hence, a detection mark size formed within such a scribing line is also as small as 60 μm or less. Additionally, to manufacture a high-density semiconductor device, various kinds of wafer processes are executed.
In alignment, a mark formed on an underlying layer is detected. In a semiconductor element manufacturing process, layers are formed on the mark one after another. This may sometimes change the shape of the mark. FIG. 9 shows an example of a change in mark line width of a detection mark. Referring to FIG. 9, a mark having a size WO equal to the design value can easily be detected if the template has its design value. However, when various kinds of films are stacked on the step structure of the detection mark during the process, the mark line width becomes smaller or larger. In the example shown in FIG. 9, the mark line width WO decreases to WP. In this case, it is difficult to detect the mark by a template prepared in advance.
Furthermore, if a mark is to be detected using a bright-field illumination method, various changes occur in the observation state due to the difference in reflectance between the mark and the peripheral portion. FIGS. 8A to 8L show an example of such a state. FIGS. 8A to 8F show a case wherein a substance having a low reflectance is used as the underlying layer of the mark, and a substance having a high reflectance is stacked on the mark. FIG. 8B shows the step structure of a detection mark formed by etching a substance having a high reflectance. FIG. 8C shows a change in reflectance of a mark WIN portion. FIG. 8D shows a change in brightness of the WIN portion. In the two-dimensional image of the mark, the mark looks black, and the peripheral portion looks white, as shown in FIG. 8A.
When the substances are changed to those having reflectances with a relationship reverse to that shown in FIG. 8A, an image as shown in FIG. 8G is obtained, and the bright and dark portions are reversed.
Examples of conventionally proposed mark detection methods using template matching are template matching using a binary image or normalized correlation. In these processes, a change in brightness of a mark cannot be detected. Hence, in these correlation processes, a template corresponding to the brightness must be prepared in advance.
As described above, along with the progress in technology for manufacturing a high-density semiconductor element, it becomes very difficult to detect an alignment mark which is present in a wide detection region and is deformed during the processes.
To avoid the problem that an alignment mark cannot be detected due to deformation, a method of storing the feature of a mark portion, from the image every time a detection error occurs, and using the stored image as a template, is generally used. Alternatively, a method of manually rewriting template information until the mark can be detected, as disclosed in Japanese Patent Laid-Open No. 10-97983, is used. With these methods, alignment cannot be completed unless operation is performed manually. In addition, if the condition of the multi-layered structure changes, the mark cannot be detected. Especially, recent semiconductor factories with a high degree of cleanness exclude manual operation of apparatuses. For this reason, if manual operation is intervened, the downtime of a semiconductor exposure apparatus becomes longer, resulting in a decrease in production efficiency.
In the field of semiconductor device manufacturing in recent years, techniques for increasing the silicon diameter, decreasing the pattern width, and forming a multi-layered interconnection structure have been developed in order to mass-produce high-capacity, high-speed, and high-performance semiconductor devices at a high yield. Accordingly, the requirements for the flatness of wafers serving as substrates are becoming more strict. To increase the flatness of wafers, a repetitive pattern serving as a dummy may sometimes be formed during the wafer processes. When a number of such patterns is uniformly formed on a wafer at a small interval, a pattern layout like the edge information of a mark disclosed in Japanese Patent Laid-Open No. 2000-260699 may be formed.
Since the purpose of alignment is to find an alignment mark which determines the wafer position from a wide visual field, an unintended pattern may sometimes enter the visual field. Assume that a constituent element (the position and direction of an edge) of such a pattern in the visual field is similar to the template by accident. In this case, if conventional template matching is performed, not the coordinates of the mark portion, but the pattern similar to the edge information of the mark, may be erroneously detected as coordinates with a high degree (value) of correlation.
This phenomenon will be described in detail with reference to FIG. 10. FIG. 10 shows a wafer surface, including a prealignment mark 251 and hole-shaped pattern 253. The cross-shaped (solid line) pattern in FIG. 10 is the prealignment mark 251. Each pattern having a circle shape is the hole-shaped pattern 253. Since the small hole-shaped patterns 253 are uniformly formed on the wafer at a small interval, a cross shape similar to the prealignment mark 251 is formed, as indicated at a detection position 252. This shape has a pattern layout similar to the edge information of the mark in terms of image processing.
When template matching is performed for the wafer shown in FIG. 10, not coordinates responding to the prealignment mark 251, but coordinates (a cross indicated by the dotted line (detection position 252)) in the hole-shaped patterns 253 may be erroneously detected as coordinates with a high degree of correlation.